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HD-15531 pdf datasheet (CMOS M

消耗积分:2 | 格式:rar | 大小:333 | 2009-01-08

胡秋阳

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The Intersil HD-15531 is a high performance CMOS device
intended to service the requirements of MIL-STD-1553 and
similar Manchester II encoded, time division multiplexed
serial data protocols. This LSI chip is divided into two sections,
an Encoder and a Decoder. These sections operate
independently of each other, except for the master reset and
word length functions. This circuit provides many of the
requirements of MIL-STD-1553. The Encoder produces the
sync pulse and the parity bit as well as the encoding of the
data bits. The Decoder recognizes the sync pulse and identifies
it as well as decoding the data bits and checking parity.
The HD-15531 also surpasses the requirements of MILSTD-
1553 by allowing the word length to be programmable
(from 2 to 28 data bits). A frame consists of three bits for
sync followed by the data word (2 to 28 data bits) followed by
one bit of parity, thus, the frame length will vary from 6 to 32
bit periods. This chip also allows selection of either even or
odd parity for the Encoder and Decoder separately.
This integrated circuit is fully guaranteed to support the
1MHz data rate of MIL-STD-1553 over both temperature and
voltage. For high speed applications the 15531B will support
a 2.5 Megabit/sec data rate.
The HD-15531 can also be used in many party line digital
data communications applications, such as a local area network
or an environmental control system driven from a single
twisted pair of fiber optic cable throughout a building.
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