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74HC155 pdf datasheet
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2008-08-06
吴湛
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MM54HC155/MM74HC155 Dual 2-To-4
Line Decoder/Demultiplexers
General Description
The MM54HC155/MM74HC155 is a high speed silicon-gate
CMOS decoder/demultiplexer. It utilizes advanced silicongate
CMOS technology and features dual 1-line-to-4-line
demultiplexers with independent strobes and common binary-
address inputs. When both sections are enabled by the
strobes, the common address inputs sequentially select and
route associated input data to the appropriate output of
each section. The individual strobes permit activating or inhibiting
each of the 4-bit sections as desired. Data applied
to input C1 is inverted at its outputs and data applied to C2
is non-inverted at its outputs. The inverter following the C1
data input permits use as a 3-to-8-line decoder, or 1-to-8-
line demultiplexer, without gating.
All inputs to the decoder are protected from damage due to
electrostatic discharge by diodes to VCC and Ground.
The device is capable of driving 10 low power Schottky TTL
equivalent loads.
The MM54HC155/MM74HC155 is functionally and pin
equivalent to the 54LS155/74LS155 with the advantage of
reduced power consumption.
Features
Y Applications
Dual 2-to-4-line decoder
Dual 1-to-4-line demultiplexer
3-to-8-line decoder
1-to-8-line demultiplexer
Y Typical propagation delay: 22 ns
Y Low quiescent current: 80 mA maximum
(74HC series)
Y Wide operating range: 2V±6V
Line Decoder/Demultiplexers
General Description
The MM54HC155/MM74HC155 is a high speed silicon-gate
CMOS decoder/demultiplexer. It utilizes advanced silicongate
CMOS technology and features dual 1-line-to-4-line
demultiplexers with independent strobes and common binary-
address inputs. When both sections are enabled by the
strobes, the common address inputs sequentially select and
route associated input data to the appropriate output of
each section. The individual strobes permit activating or inhibiting
each of the 4-bit sections as desired. Data applied
to input C1 is inverted at its outputs and data applied to C2
is non-inverted at its outputs. The inverter following the C1
data input permits use as a 3-to-8-line decoder, or 1-to-8-
line demultiplexer, without gating.
All inputs to the decoder are protected from damage due to
electrostatic discharge by diodes to VCC and Ground.
The device is capable of driving 10 low power Schottky TTL
equivalent loads.
The MM54HC155/MM74HC155 is functionally and pin
equivalent to the 54LS155/74LS155 with the advantage of
reduced power consumption.
Features
Y Applications
Dual 2-to-4-line decoder
Dual 1-to-4-line demultiplexer
3-to-8-line decoder
1-to-8-line demultiplexer
Y Typical propagation delay: 22 ns
Y Low quiescent current: 80 mA maximum
(74HC series)
Y Wide operating range: 2V±6V
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