rfPIC12F675K/675F/675H DS80174A-page 2 2003 Microchip Technology Inc. APPENDIX A: REVISION HISTORY Rev A Document (11/2003) Original errata document. Issue 1 – VDD and VDDRF Supply Voltage maximum has been reduced to 4.5V. Issue 2 – The loop filter (LF) signal will no longer be bonded out. Pin 13 is a no connection. Issue 3 – The reference clock (REFCLK) signal will no longer be bonded out. Pin 7 is a no connection