可编程逻辑
关键词: Atmel , EMBEST , SAM9G45
EMBEST公司的ATMEL SAM9G45全功能评估板的主频高达400MHz,可支持WinCE和Linux操作系统的开发板调试,带有256MB NandFlash,2MB NorFlash,512KB EEPROM,4MB数据闪存,以及2个64MB的DDR2 SDRAM,并带有丰富的功能扩展如高速USB2.0(480MHz),音频输入,音频输出,10/100Mbps网络,JTAG调试接口,DBGU串口,Micro SD卡接口,SD/MMC卡接口,CMOS摄像头接口,支持8位/12位视频数据采集,主要用在工业应用如建筑物自动化,数据采集,POS终端,告警系统和医疗设备.本文介绍了AT91SAM9G45主要特性,方框图和ATMEL SAM9G45 ARM9 评估板主要特性以及威廉希尔官方网站
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2012-3-7 10:53:16 上传
The ARM926EJ-S based AT91SAM9G45 features the frequently demanded combination of user interface functionality and high data rate connectivity, including LCD Controller, resistive touchscreen, camera interface, audio, Ethernet 10/100 and high speed USB and SDIO. With the processor running at 400MHz and multiple 100+ Mbps data rate peripherals, the AT91SAM9G45 has the performance and bandwidth to the network or local storage media to provide an adequate user experience.
The AT91SAM9G45 supports the latest generation of DDR2 and NAND Flash memory interfaces for program and data storage. An internal 133 MHz multi-layer bus architecture associated with 37 DMA channels, a dual external bus interface and distributed memory including a 64- KByte SRAM which can be configured as a tightly coupled memory (TCM) sustains the high bandwidth required by the processor and the high speed peripherals.
The I/Os support 1.8V or 3.3V operation, which are independently configurable for the memory interface and peripheral I/Os. This feature completely eliminates the need for any external level shifters. In addition it supports 0.8 ball pitch package for low cost PCB manufacturing.
The AT91SAM9G45 power management controller features efficient clock gating and a battery backup section minimizing power consumption in active and standby modes.
AT91SAM9G45主要特性:
• 400 MHz ARM926EJ-S™ ARM® Thumb® Processor
– 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU
• Memories
– DDR2 Controller 4-bank DDR2/LPDDR, SDRAM/LPSDR
– External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static Memories, CompactFlash, SLC NAND Flash with ECC
– One 64-KByte internal SRAM, single-cycle access at system speed or processor speed through TCM interface
– One 64-KByte internal ROM, embedding bootstrap routine
• Peripherals
– LCD Controller supporting STN and TFT displays up to 1280*860
– ITU-R BT. 601/656 Image Sensor Interface
– USB Device High Speed, USB Host High Speed and USB Host Full Speed with On-Chip Transceiver
– 10/100 Mbps Ethernet MAC Controller
– Two High Speed Memory Card Hosts (SDIO, SDCard, MMC)
– AC’97 controller
– Two Master/Slave Serial Peripheral Interfaces
– Two Three-channel 16-bit Timer/Counters
– Two Synchronous Serial Controllers (I2S mode)
– Four-channel 16-bit PWM Controller
– Two Two-wire Interfaces
– Four USARTs with ISO7816, IrDA, Manchester and SPI modes
– 8-channel 10-bit ADC with 4-wire Touch Screen support
• System
– 133 MHz twelve 32-bit layer AHB Bus Matrix
– 37 DMA Channels
– Boot from NAND Flash, SDCard, DataFlash® or serial DataFlash
– Reset Controller with on-chip Power-on Reset
– Selectable 32768 Hz Low-power and 12 MHz Crystal Oscillators
– Internal Low-power 32 kHz RC Oscillator
– One PLL for the system and one 480 MHz PLL optimized for USB High Speed Two Programmable External Clock Signals Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer, Real Time Timer and Real Time Clock
• I/O Five 32-bit Parallel Input/Output Controllers
– 160 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os with Schmitt trigger input
• Package
– 324-ball TFBGA, pitch 0.8 mm
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