引用: ***4 发表于 2018-9-30 13:07
嗨，Sounak，
1。对于具有CFG5笔记本参考固件的DFP，您应该检查CGG5示例固件是否基于哪个示意图。由于主机端通常需要支持USB 3.0和DISPACK端口。你正在设计哪一个PIN任务。如果您确认以上信息，并确保它是正确的。请在这个线程上传CC协商日志。
2。对于具有CFG5笔记本参考固件的UFP，您需要确保DP接收器功能已经启用或不启 ...
你好，丽莎，
1。我们已经使用了CG1的示意性参考。主机端支持USB 3和DP。我们已经验证了我们的核心在另一个开发板没有C型能力。在DFP中，我们使用K7（HPD1）作为控制器的输出并输入到我们的核心。CC线是从C型连接器到核心的输入。UFP板上的连接正好相反。HPD是输入到控制器和从我们的核心输出。如何获取CC谈判日志？我没有CY 4500。
2。如何启用DP汇功能？这有什么宏观关联吗？我感兴趣的唯一宏是“DPYDFPL SUPDP”和“DPUUFPI SUPDP”。我试着让他们单独为两边。
三。我们正在使用DFP侧的C型监视器和UFP侧的C型笔记本进行测试。
请注意，在我们的申请中，我们有单独的董事会作为DFP和UFP。在DFP方面，我们的核心是作为一个主机，而在UFP方面，我们的核心是作为一个设备。
IMAGE 01.JPG
564字节
以上来自于百度翻译
以下为原文
Hello Lisa,
1. We have used the schematic reference for CCG1. The host end has support for USB 3.0 and DP. We have validated that by using our core in another development board without the Type C capabilities. In the DFP we are using the K7 (HPD_1) as an output from the controller and input to our core. The CC lines are an input to the core from the Type C connector. The connection is just the opposite on the UFP board. The HPD is an input to the controller and output from our core. How do I get the CC negotiation logs? I don’t have the CY 4500.
2. How to enable the DP sink function? Is there any macro related to that? The only macro which I found of interest was the “DP_DFP_SUPP” and “DP_UFP_SUPP”. I tried enabling them individually for either sides.
3. We are testing using a Type C monitor on DFP side and a Type C notebook on the UFP side.
Please note that in our application we have separate boards as DFP and UFP. On the DFP side our core is acting as a host and on the UFP side our core is acting as a device.
引用: ***4 发表于 2018-9-30 13:07
嗨，Sounak，
1。对于具有CFG5笔记本参考固件的DFP，您应该检查CGG5示例固件是否基于哪个示意图。由于主机端通常需要支持USB 3.0和DISPACK端口。你正在设计哪一个PIN任务。如果您确认以上信息，并确保它是正确的。请在这个线程上传CC协商日志。
2。对于具有CFG5笔记本参考固件的UFP，您需要确保DP接收器功能已经启用或不启 ...
你好，丽莎，
1。我们已经使用了CG1的示意性参考。主机端支持USB 3和DP。我们已经验证了我们的核心在另一个开发板没有C型能力。在DFP中，我们使用K7（HPD1）作为控制器的输出并输入到我们的核心。CC线是从C型连接器到核心的输入。UFP板上的连接正好相反。HPD是输入到控制器和从我们的核心输出。如何获取CC谈判日志？我没有CY 4500。
2。如何启用DP汇功能？这有什么宏观关联吗？我感兴趣的唯一宏是“DPYDFPL SUPDP”和“DPUUFPI SUPDP”。我试着让他们单独为两边。
三。我们正在使用DFP侧的C型监视器和UFP侧的C型笔记本进行测试。
请注意，在我们的申请中，我们有单独的董事会作为DFP和UFP。在DFP方面，我们的核心是作为一个主机，而在UFP方面，我们的核心是作为一个设备。
IMAGE 01.JPG
564字节
以上来自于百度翻译
以下为原文
Hello Lisa,
1. We have used the schematic reference for CCG1. The host end has support for USB 3.0 and DP. We have validated that by using our core in another development board without the Type C capabilities. In the DFP we are using the K7 (HPD_1) as an output from the controller and input to our core. The CC lines are an input to the core from the Type C connector. The connection is just the opposite on the UFP board. The HPD is an input to the controller and output from our core. How do I get the CC negotiation logs? I don’t have the CY 4500.
2. How to enable the DP sink function? Is there any macro related to that? The only macro which I found of interest was the “DP_DFP_SUPP” and “DP_UFP_SUPP”. I tried enabling them individually for either sides.
3. We are testing using a Type C monitor on DFP side and a Type C notebook on the UFP side.
Please note that in our application we have separate boards as DFP and UFP. On the DFP side our core is acting as a host and on the UFP side our core is acting as a device.
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