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[问答]

深入的PSoC 5lp如何:NMI和LOCKUP信号

大家好,
我目前正在寻找安全关键的HW选项在PSoC5LP。
NMI似乎只能通过软件来挂起,但是PSoC5LP寄存器TRM指出,当PANTHEL WAITSITER寄存器的NMIZ-SRCSEL位设置为1时,NMI线被馈送DSI001OUTXPY11信号。这个信号是什么?它是通过UDB/DATAPATH块进行路由的吗?
我还阅读了Joseph Yiu的《ARCORTEX-M3》的权威指南,并想知道如何在PSOC5LP中使用锁定信号(第12.5节)。是否触发系统重置?
当做,
卡德里克

以上来自于百度翻译


     以下为原文
  Hi everyone,

I'm currently looking into safety-critical related HW options in the PSoC5lp.

NMI seems to be only pendable by software, however the PSoC5lp Registers TRM states that when the NMI_SRCSEL bit of the PANTHER_WAITPIPE register is set to 1, the NMI line is fed with DSI_01_OUT_P_11 signal. What is this signal ? Is it routable through UDB/datapath blocks ?

I also read the "Definitive Guide to the ARM Cortex-M3" book by Joseph Yiu and was wondering how the LOCKUP signal (section 12.5) is used in the PSoC5lp. Does it trigger a SystemReset ?

Regards,
Cédric

回帖(2)

徐小婷

2018-10-8 16:29:47
DSI001OUTXPY11是DSI位置。
DSI位置用以下信息编码:
1)DSI数(00—09,12, 13)
2)“in”或“OUT”信号(所有信号方向相对于UDB阵列描述),因此“in”信号是从外部进入UDB阵列的信号,并且“OUT”信号是离开UDB阵列的信号)。
3)连接类型“P”或“T”,表示DSI上连接的数量。一个“P”代表对,这意味着DSI上的相关信号有两个连接。A“T”表示一个三元组,这意味着DSI上的相关信号有三个连接。
4)连接数(p为0~24,出p为0~15,出t为0~15)。
Dsia01IOUTXP1111(CM3O-DSIIN NMI),/ /非可屏蔽中断到皮质M3
NMI中断可以在启用NMIZ-SRCSEL比特之后由该引脚触发。

以上来自于百度翻译


     以下为原文
  DSI_01_OUT_P_11 is a DSI location.
The DSI location is encoded with the following information:
1.) The DSI number (00-09, 12, 13)
2.) “in” or “out” signal (all signal directions are described with respect to the UDB array, so an “in” signal is a signal that is entering the UDB array from outside, and an “out” signal is a signal leaving the UDB array)
3.) The connection type “p” or “t” which represents the number of connections on the DSI. A “p” stands for pair, meaning there are two connections on the DSI for the associated signal. A “t” represents a triplet, meaning there are three connections on the DSI for the associated signal.
4.) The connection number (in p # 0 – 24, out p # 0 – 15, out t # 0 – 15)
.dsi_01_out_p_11( cm3_dsi_nmi ), // non-maskable interrupt to the Cortex M3
the NMI interrupt can be triggered by this pin after enabling the NMI_SRCSEL bit
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刘慧

2018-10-8 16:38:05
PSoC Creator不直接暴露NMI。PSoC Creator没有正式记录/支持的过程。
谢谢
Jobin燃气轮机

以上来自于百度翻译


     以下为原文
  PSoC Creator does not expose the NMI directly. And there is no process officially documented/supported by PSoC Creator.
 
Thanks
Jobin GT
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