现在,我在ISE13.1软件中使用srio_v5_6 Ip内核。
我使用CORE生成器为X6VLX240T-1156-1设备生成一个srio_v5_6 IP内核。
然后我用ISE13.1软件打开“srio_v5_6.xise”。
我合成了项目并实现了它,但是在实现项目时发生了错误如下:
错误:NgdBuild:604 - 无法解析类型为'srio_icon'的逻辑块'srio_icon_gen.i_srio_icon'。
引脚名称拼写错误可能导致此问题,缺少edif或ngc文件,块名称与edif或ngc文件名之间的大小写不匹配,或者类型名称的拼写错误。
目标'virtex6'不支持符号'srio_icon'.ERROR:NgdBuild:604 - 无法解析类型为'rio_ila'的逻辑块'rio_de_wrapper / rio_ila1_gen.i_rio_ila'。
引脚名称拼写错误可能导致此问题,缺少edif或ngc文件,块名称与edif或ngc文件名之间的大小写不匹配,或者类型名称的拼写错误。
目标'virtex6'不支持符号'rio_ila'.ERROR:NgdBuild:604 - 无法解析类型为'phy_ila'的逻辑块'rio_de_wrapper / phy_wrapper / srio_ila2_gen.i_phy_ila'。
引脚名称拼写错误可能导致此问题,缺少edif或ngc文件,块名称与edif或ngc文件名之间的大小写不匹配,或者类型名称的拼写错误。
目标'virtex6'不支持符号'phy_ila'.ERROR:NgdBuild:604 - 无法解析类型为'srio_vio'的逻辑块'user_top / ini
tiator_user / tickler / srio_vio_gen.i_srio_vio'。
引脚名称拼写错误可能导致此问题,缺少edif或ngc文件,块名称与edif或ngc文件名之间的大小写不匹配,或者类型名称的拼写错误。
目标'virtex6'不支持Symbol'srio_vio'。
它出什么问题了?
你可以帮我吗 ?
非常感谢你!
以上来自于谷歌翻译
以下为原文
Now, I am using the srio_v5_6 Ip core in the ISE13.1 software. I use the CORE generator generate a srio_v5_6 IP core for the X6VLX240T-1156-1device.
Then I use the ISE13.1 software open the "srio_v5_6.xise". And I synthesize the project and Implement the it, but errors happen when implement the project as follow:
ERROR:NgdBuild:604 - logical block 'srio_icon_gen.i_srio_icon' with type
'srio_icon' could not be resolved. A pin name misspelling can cause this, a
missing edif or ngc file, case mismatch between the block name and the edif
or ngc file name, or the misspelling of a type name. Symbol 'srio_icon' is
not supported in target 'virtex6'.
ERROR:NgdBuild:604 - logical block 'rio_de_wrapper/rio_ila1_gen.i_rio_ila' with
type 'rio_ila' could not be resolved. A pin name misspelling can cause this,
a missing edif or ngc file, case mismatch between the block name and the edif
or ngc file name, or the misspelling of a type name. Symbol 'rio_ila' is not
supported in target 'virtex6'.
ERROR:NgdBuild:604 - logical block
'rio_de_wrapper/phy_wrapper/srio_ila2_gen.i_phy_ila' with type 'phy_ila'
could not be resolved. A pin name misspelling can cause this, a missing edif
or ngc file, case mismatch between the block name and the edif or ngc file
name, or the misspelling of a type name. Symbol 'phy_ila' is not supported in
target 'virtex6'.
ERROR:NgdBuild:604 - logical block
'user_top/initiator_user/tickler/srio_vio_gen.i_srio_vio' with type
'srio_vio' could not be resolved. A pin name misspelling can cause this, a
missing edif or ngc file, case mismatch between the block name and the edif
or ngc file name, or the misspelling of a type name. Symbol 'srio_vio' is not
supported in target 'virtex6'.
What's wrong with it? Can you help me ?
Thank you very much!