QSPI闪存模式位是什么？

当我在S25FS512S数据表中遇到同样的事情时，我也在想同样的事情。这两个设备（和数据表）是足够相似的。
在“双I/O读”和“四I/O读”命令部分下，数据表表示暗示下一个命令指令与当前命令相同，模式位必须等于“AXH”。为了澄清，“AXH”是指上半字节（位7- 4）必须等于“AH”，而下半字节（位3-0）可以是任何东西。
在“DDR双IO Read”和“DDR Quad I/O读取”命令部分下，数据表说明模式位类似地使用，除了要求上下刻蚀必须互补。
注意，模式位的值取决于您使用的哪一组指令。



     以下为原文
  I was wondering the same thing when I encountered the same thing in the S25FS512S datasheet. The two devices (and datasheets) are similar enough.
 
Under both the 'Dual I/O Read' and 'Quad I/O Read' command sections, the datasheet states that to imply the next command instruction is the same as the current one, the mode bits must equal 'Axh'. To clarify, 'Axh' means the upper nibble (bits 7-4) must equal 'Ah' and the lower nibble (bits 3-0) can be anything.
 
And under the 'DDR Dual IO Read' and 'DDR Quad I/O Read' command sections, the datasheet states that the mode bits are similarly used except with the requirement that the upper and lower nibbles must be complementary.
 
Note that the values of the mode bits differ depending on which set of instructions you are using.

如果这是模式位的唯一用途，我会很惊讶（失望）。我确实读了一个ISSI DDR部分的数据表，它说了几乎相同的事情——“如果模式位＝AXH（X不关心），它可以执行AX读取模式（没有命令）。当模式位与AXH不同时，该装置退出AX读取操作。微米甚至没有提到模式位。



     以下为原文
  I'd be really surprised (and disappointed) if that is the only use of the mode bits. I did read the data sheet for an ISSI DDR part and it says pretty much the same thing - "If the mode bits=AXh (where X is don’t care), it can execute the AX read mode (without command). When the mode bits are different from AXh, the device exits the AX read operation".  Micron doesn't even mention mode bits