请问可以直接使用来自FX2LP固件的端点向主机FIFO写入数据吗？

您将能够从8051.HTTP://wwwyCysP.com／手动模式向从属FIFO写入数据。Re= 45 850详细解释，并附带了示例代码。当做，
阿南德



     以下为原文
   You'll be able to write data to slave FIFO in manual mode from the 8051. http://www.cypress.com/?rID=45850 explains it in detail and has sample code along with it.
Regards,
    Anand

你能详细说明一下你的申请吗？



     以下为原文
          Could you also please elaborate on your application?   

你好，
你是说你想要一个不从主机获得数据的外端点。您只需在端点上写入数据，并将其武装到从FIFO域，以便主机可以读取它？
正如Nikhil所要求的，请分享你的申请。
-加里马



     以下为原文
   Hi,
    Are you saying you want an OUT endpoint, which does not get data from host. You simply write data on the endpoint and arm it to the Slave FIFO domain, so that master can read it?
    As Nikhil asked, please share your application.
    -Garima 

嗨，正如Garima所说，如果你想从FX2LP数据源到奴隶FIFO，你可以这样做如下。保持端点（在这种情况下的EP2）作为无效端点，但在缓冲、方向和自动/手动模式方面配置正确。在这个例子中，我选择了EP2是一个外端点，四缓冲，每个字节512个，手动模式。EP2CFG＝0x7f；EP2CFOFFG＝0x00；FiPosit＝0x80；SimcCdTe= 0x02；SycCdEnter；EP2FIFOBUF（0）＝0xAA；SycCdEnter；EP2BCH＝0x02；SYNCDELAY；//EP2BCL＝0x00；SYNCDELAY；/EP2BCH＝0x02；SYNCDELAY；/EP2BCL＝0x00；SimcDelp；EP2BCH＝0x02；SimcDelp；EP2BCL＝0x0；（0；同步延迟；EP2BCH= 0x02；同步延迟；EP2BCL＝0x00；同步延迟；FippET= 0x00；问候，Gayathri



     以下为原文
          Hi, As Garima said, if you want to source the data from FX2LP to the Slave FIFO, you can do so as below. Keep the endpoint (EP2 OUT in this case) as invalid endpoint, but configured properly with respect to buffering, direction and Auto/ Manual mode. In this example, I have chosen EP2 to be an OUT endpoint, quad buffered, of 512 bytes each, manual mode. (EP2CFG = 0xA0; EP2CFG &= 0x7F; EP2FIFOCFG = 0x00; ) FIFORESET = 0x80; SYNCDELAY; FIFORESET = 0x02; SYNCDELAY; EP2FIFOBUF[0] = 0xAA; SYNCDELAY; EP2BCH = 0x02; SYNCDELAY; // EP2BCL = 0x00; SYNCDELAY; // EP2BCH = 0x02; SYNCDELAY; // EP2BCL = 0x00; SYNCDELAY; EP2BCH = 0x02; SYNCDELAY; EP2BCL = 0x00; SYNCDELAY; EP2BCH = 0x02; SYNCDELAY; EP2BCL = 0x00; SYNCDELAY; FIFORESET = 0x00; Regards, Gayathri