为什么我的Pcore没有产生输出？

我在Verilog中编写了自己的VGA驱动程序。
我想将它集成到Pcore中，这样我就可以使用Microblaze更新显示。
好消息：
VGA驱动程序工作。
我有一个我可以显示的测试模式，如果我只是下载比特流并在FPGA中没有其他任何东西运行它。
坏消息：
将它集成到Pcore后，我没有得到任何输出到显示器。
组态：
采用XC3S500E FPGA和VGA端口的Digilent Spartan 3E入门板
EDK（XPS和XSDK）14.3
至今：
VGA驱动程序已知很好，并且不需要输入来运行testpattern
独立和Pcore配置的UCF定义了相同的引脚
Pcore只有5个输出（R，G，B，VS，HS）作为单个位，应该很简单
Pcore在XPS中定义和映射这些端口
C代码在CPU上执行，寄存器似乎可以访问
我没有对输出进行任何保护，它们应该自动运行
我错过了一些明显的东西吗
或者，不太可能，微妙？
有关调试指导的任何建议（没有实验室访问o-scope或逻辑分析仪，所以也许ChipScope可以查看输出是否正在发生）？
如果需要，我可以发布文件。



以下为原文

I wrote my own VGA driver in Verilog. I want to integrate it into a Pcore so I can update the display using Microblaze.

The good news:
The VGA driver works. I have a testpattern that I can display if I just download the bitstream and run it with nothing else in the FPGA.

The bad news:
After integrating it into the Pcore, I don't get any output to the display.

Configuration:
Digilent Spartan 3E Starter Board with XC3S500E FPGA and VGA port
EDK (XPS and XSDK) 14.3

So far:
The VGA driver is known good and should require no inputs to run the testpattern
The UCF for both the standalone and Pcore configurations have the same pins defined
The Pcore has only 5 outputs (R,G,B,VS,HS) as single bits, should be simple
The Pcore has these ports defined and mapped in XPS
C code executes on the CPU and the registers appear to be accessible
I haven't put any guard on the outputs, they should just automatically run

Am I missing something obvious? Or, less likely, subtle? Any recommendations for directions to debug (no lab access to o-scope or logic analyzer, so maybe ChipScope to see if output is happening)?

I can post the files if desired.