您好，我正在使用Spartan 6，XC6SLX45T。
我能够在
tile0中实现两个GTP，但是当它附带tile1的测试时，它不能很好地工作。
我没有改变我的旧测试平台，只是改变了TXDATA和RXDATA（16位）从TILE0中的GTP到我的GTP_top文件中TILE1中的GTP的连接，该文件基本上是从Xilinx GTP IPcore生成的。
我还直接测试了原始模拟（使用frame_gen和fram_check进行项目..），它可以正常工作。
因此，我想知道是否有某些设置可能会影响我的磁贴工作，我可能需要在测试平台中添加？
期待回应。
问候
以上来自于谷歌翻译
以下为原文
Hello, I'm using Spartan 6, XC6SLX45T.
I was able to implement two GTPs in tile0, but when it comes with the test of tile1, it doesn't work well.
I didn't change my old testbench, but only change the connections of TXDATA and RXDATA(16bits) from GTP in TILE0 to GTP in TILE1 in my GTP_top file which is basically generated from the Xilinx GTP IPcore. And I also tested the original simulation directly(the project with frame_gen and fram_check..), it works fine both tiles.
Therefore I was wondering is there some sorts of settings that could influence my tile working which I might have to add in the testbench?
Looking forward to a respond.
regards
