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chunhuahua

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[问答]

RK3566如何配置GPIO0_D6输出24M晶振频率呢

最新git sdk

我在自己添加节点,实现rk355 控制rk628d,也看了你们william hill官网
其他相关文档。麻烦请支持下;

从今年的2月份就有人发william hill官网
后,说后续会支持rk628d,现在时12月中旬了,我刚前二天发帖还是说后续会支持.....

我现在就自己调试一个hdmiin 转mipi就可以了。

报错如下

rk3566_firefly_aiojd4:/ $ dmesg |grep 'rk628'
[    1.020168] rk628 2-0050: failed to access register: -6

rk3566_firefly_aiojd4:/ $ dmesg |grep 'rk628'
[    0.971936] rk628 2-0050: failed to request reset GPIO: -16
[    0.971968] rk628: probe of 2-0050 failed with error -16

dts配置如下: 我用的是i2c2,从模式&i2c2 {
status = "okay";
// clock-frequency = <400000>;//时钟
clock-frequency = <2400000>;//时钟

// pinctrl-0 = <&i2c2m0_xfer>;
// hym8563: hym8563@51 {
// status = "okay";
// compatible = "haoyu,hym8563";
// reg = <0x51>;
// #clock-cells = <0>;
// rtc-irq-gpio = <&gpio0 RK_PD4 IRQ_TYPE_EDGE_FALLING>;
// clock-frequency = <32768>;
// //clock-output-names = "xin32k";
// /* rtc_int is not connected */
// };

rk628: rk628@50 {//如需使用rk628传输mipi信号要使能
compatible = "rockchip,rk628";//驱动match用
reg = <0x50>;//地址
interrupt-parent = <&gpio3>;//中断parent
interrupts = <RK_PD5 IRQ_TYPE_LEVEL_LOW>;//中断引脚和极性
reset-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;//复位gpio

status = "okay";

};

};

#include "rk628.dtsi"

&rk628_combtxphy {//如需使用rk628传输mipi信号要使能
status = "okay";
};

&rk628_combrxphy {//如需使用rk628传输mipi信号要使能
status = "okay";
};

// 图像接收链路dts配置
&rk628_csi {//如需使用rk628传输mipi信号要使能
status = "okay";

//plugin-det-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
power-gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;//配置电源gpio
rockchip,camera-module-index = <0>;//配置camera模块
rockchip,camera-module-facing = "back";//配置camera模块
rockchip,camera-module-name = "RK628-CSI";//配置camera模块
rockchip,camera-module-lens-name = "NC";//配置camera模块

port {
hdmiin_out0: endpoint {//配置endpoint
// remote-endpoint = <&hdmi2mipi_in>;//远端endpoint名 //zcp先关闭
data-lanes = <1 2 3 4>;//数据线数
};
};

};

at /sys/kernel/debug/clk/clk_summary |grep gpio                               <
dbclk_gpio                        0        0        0    24000000          0     0  50000
dbclk_gpio4                    0        0        0    24000000          0     0  50000
dbclk_gpio3                    0        0        0    24000000          0     0  50000
dbclk_gpio2                    0        0        0    24000000          0     0  50000
dbclk_gpio1                    0        0        0    24000000          0     0  50000
pclk_gpio4            1        1        0    99000000          0     0  50000
pclk_gpio3            1        1        0    99000000          0     0  50000
pclk_gpio2            1        1        0    99000000          0     0  50000
pclk_gpio1            1        1        0    99000000          0     0  50000
dbclk_gpio0                       0        0        0    24000000          0     0  50000
pclk_gpio0            1        1        0   100000000          0     0  50000
*

回帖(2)

刘燕

2023-1-10 11:30:47
PIN-Ctrl如何使用,参考 SDK内的文档 RKDocs/common/PIN-Ctrl/Rockchip-Developer-Guide-Linux-Pin-Ctrl-CN.pdf
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chunhuahua

2023-1-10 11:30:57
使用外部晶振已经搞定这一步了。芯片时钟正常了。还有一些问题在调试。
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