时序逻辑设计实践 (Sequential Logic Design Practices) The purpose of this chapter is to familiarize you with the most commonly used and dependable sequential-circuit design methods. Therefore, we will emphasize synchronous systems, that is, systems in which all flip-flops are clocked by the same, common clock signal. Although it’s true that all the world does not march to the tick of a common clock, within the confines of a digital system or subsystem we can make it so. When we interconnect digital systems or subsystems that use different clocks, we can usually identify a limited number of asynchronous signals that need special treatment, as we’ll show later. We begin this chapter with a quick summary of sequential circuit documentation standards. After revisiting the most basic building blocks of sequential-circuit design—latches and flip-flops—we describe some of the most flexible building blocks—sequential PLDs. Next we show how counters and shift registers are realized in both MSI devices and PLDs, and show some of their applications. Finally, we show how these elements come together in synchronous systems and how the inevitable asynchronous