Xilinx Vertex-4 DSP应用程序xapp706是否可在Spartan-6上移植

在第一次通过时，看起来dsp切片只是在多添加/ mac设置中使用。
在这种情况下，将它移植到S6应该不会太多工作。
必须考虑实例化中的一些差异。是的，您可以使用宏/原语而无需使用任何IP。另请注意，OSD IP内核进行alpha混合并支持spartan 6。
www.xilinx.com



以下为原文

At first pass, it looks like the dsp slice is simply being used in a mult-add/mac setup. In which case, it shouldn't be too much work to port it over to S6. There will be some differences in the instantiation that will have to be accounted for.

And yes, you can use the macro/primitive without needing to use any IP.

Also note that the OSD IP core does alpha blending and supports spartan 6.www.xilinx.com

您看到的可能变化有哪些？
架构似乎有所不同 - 应用程序执行DDR复用和解复用。
DSP48是向后兼容的吗？
我相信Xilinx会有人试图在Spartan-6上移植应用程序，请提供一些关于您所看到的更改的输入。
谢谢。



以下为原文

What are the possible changes you see? The architecture seems to be different - the application does DDR muxing and demuxing. Are the DSP48's backward compatible?
 
I am sure somebody would have in Xilinx would have tried to port the application on Spartan-6, please provide some inputs on the changes you see.
Thanks.
 

你提到了OSD LogiCore IP，它的Xilinx页面说它支持RGB＆amp;
RGBA  - 当只给出RGB时，它如何计算“A”？



以下为原文

You mentioned OSD LogiCore IP, the Xilinx page for it says that it supports RGB & RGBA - How does it calculate "A" when only RGB is given?

它不计算alpha通道。
它需要它作为输入。看起来应用笔记在交错/时域多路复用的意义上做'DDR'，所以你运行DSP的速度是结构的两倍。
您可以使用任何DSP切片执行此操作。
www.xilinx.com



以下为原文

It doesn't calculate the alpha channel. It takes it as an input.

It looks like the app note does 'DDR' in the sense of interleaving/time domain multiplexing so you run the DSP at twice the speed of the fabric. You can do that with any DSP slice.www.xilinx.com