OpenArty项目将ZipCPU（不是微型激光）连接到DDR3 SDRAM。
即便如此，也可以通过在主文件顶部注释一个简单的`ifdef来删除ZipCPU，这仍然可以让您通过UART运行的软件访问SDRAM。
然后通过wishbone总线访问SDRAM。
OpenArty SDRAM内存访问方法的一个关键组件是AXI桥的流水线叉骨。
我个人觉得比AXI更容易使用的wishbone总线。
该项目的所有源代码都可以在GitHub上获得，虽然我确实需要Arty板配置文件中的参数（一个xml文件，因此是可读的），以便正确配置DDR3 SDRAM。
担
以上来自于谷歌翻译
以下为原文
The OpenArty project connects a ZipCPU (not a microblaze) to DDR3 SDRAM. Even at that, the ZipCPU can be removed with by commenting a simple `ifdef at the top of the main file which will still give you access to the SDRAM from software running over a UART. The SDRAM is then accessed over a wishbone bus.
A key component of the OpenArty approach to SDRAM memory access is the pipelined wishbone to AXI bridge. I personally find the wishbone bus simpler to use than AXI.
All of the source code for that project is available on GitHub, although I did need the parameters from the Arty board configuration file (an xml file, hence readable) in order to get the DDR3 SDRAM configured properly.
Dan
OpenArty项目将ZipCPU（不是微型激光）连接到DDR3 SDRAM。
即便如此，也可以通过在主文件顶部注释一个简单的`ifdef来删除ZipCPU，这仍然可以让您通过UART运行的软件访问SDRAM。
然后通过wishbone总线访问SDRAM。
OpenArty SDRAM内存访问方法的一个关键组件是AXI桥的流水线叉骨。
我个人觉得比AXI更容易使用的wishbone总线。
该项目的所有源代码都可以在GitHub上获得，虽然我确实需要Arty板配置文件中的参数（一个xml文件，因此是可读的），以便正确配置DDR3 SDRAM。
担
以上来自于谷歌翻译
以下为原文
The OpenArty project connects a ZipCPU (not a microblaze) to DDR3 SDRAM. Even at that, the ZipCPU can be removed with by commenting a simple `ifdef at the top of the main file which will still give you access to the SDRAM from software running over a UART. The SDRAM is then accessed over a wishbone bus.
A key component of the OpenArty approach to SDRAM memory access is the pipelined wishbone to AXI bridge. I personally find the wishbone bus simpler to use than AXI.
All of the source code for that project is available on GitHub, although I did need the parameters from the Arty board configuration file (an xml file, hence readable) in order to get the DDR3 SDRAM configured properly.
Dan
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