我的主人应该支持GEN1和GEN2。
当在Gen1进行速度协商时,phy必须生成GEN1时钟和
当在Gen2进行速度协商时,phy必须生成GEN2时钟。
在virtex6板上,有端口级支持,但对于仅通过DRP端口的spartan 6,我们可以配置PHY。
那么有没有现成的代码可用于驱动DRP端口,或者我们可以从coregen生成。
以上来自于谷歌翻译
以下为原文
My host supposed to support GEN1 and GEN2.
when speed negotiation is done at Gen1, the phy has to generate the GEN1 clocks and
When speed negotiation is done at Gen2, the phy has to generate the GEN2 clocks.
In virtex6 board for this, there is port level support, But for spartan 6 only through DRP ports the we can configure the PHY.
So is there any readymade code available for driving the DRP ports or we can generate from the coregen .
我的主人应该支持GEN1和GEN2。
当在Gen1进行速度协商时,phy必须生成GEN1时钟和
当在Gen2进行速度协商时,phy必须生成GEN2时钟。
在virtex6板上,有端口级支持,但对于仅通过DRP端口的spartan 6,我们可以配置PHY。
那么有没有现成的代码可用于驱动DRP端口,或者我们可以从coregen生成。
以上来自于谷歌翻译
以下为原文
My host supposed to support GEN1 and GEN2.
when speed negotiation is done at Gen1, the phy has to generate the GEN1 clocks and
When speed negotiation is done at Gen2, the phy has to generate the GEN2 clocks.
In virtex6 board for this, there is port level support, But for spartan 6 only through DRP ports the we can configure the PHY.
So is there any readymade code available for driving the DRP ports or we can generate from the coregen .
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