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使用1847作为I2C从机有吗?所有信号的详细描述都会有帮助。数据表非常混乱。它并没有说明HET’p’位(停止)将被正确设置。它还说‘P’位集总是在从属模式下产生中断,但我从来没有得到一个……我想在中断中检测到最后一个字节已经被接收。(因此,我可以为主程序设置一个标志,使数据可以被处理。现在我在主干上投票'P'位,用Lo/Hi重置到SSPN位,但对我来说这有点麻烦。
以上来自于百度翻译 以下为原文 Is there some AN on using the 1847 as i2c slave? A detailed description of all signals would help. The datasheet is very confusing. It doesn't say when het 'P' bit (stop) will be set exactly. It also says that 'P' bit set will always generate an interrupt in slave mode, but I never get one... I want to detect inside the interrupt that the last byte has been received. (so I can set a flag for main program that data can be processed) For now I poll the 'P' bit in main and reset it by a lo/hi to the SSPEN bit. But that is a bit of a kludge to me... |
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任何说明如何在MSSP外设上执行它的注释都是适用的。这是设备数据表所需的。它是在接收到停止位时设置的。在第一次传输之后,您将总是有S或P集,哪一个是最后一个检测到的状态。这取决于您在SSPM位中选择的模式。您使用的模式是0B1110吗?
以上来自于百度翻译 以下为原文 Any note showing how to do it on an MSSP peripheral should be applicable. That is what the device datasheet is for. It is set when a STOP bit is received. After the first transfer, you will always have either S or P set, whichever was the last detected state. It depends upon which mode you selected in the SSPM bits. Are you using mode 0b1110 ? |
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啊,没注意到那个模式…如果他们使用了PCIE和SCIE比特,那么我会更容易……我怎么知道它是一个启动中断,而不是一个数据/地址字节?(开始在整个传输期间保持高)我需要看看BF标志是否清楚知道它是“S”还是“P”标志中断?
以上来自于百度翻译 以下为原文 Ah, Didn't notice that mode... :) Would have been easier if they used the PCIE and SCIE bits for that... How do I know it's for instance a START interrupt, and not a data/addres***yte? (start stays high during whole transmission) Do I need to see if the BF flag is clear to know it's a 'S' or 'P' flag interrupt? |
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事实上,你比我领先一步。我从来没有使用过这些比特,因为我在所有没有用它们的老图片中写下了我所有的I2C代码。数据表说它们允许以前没有启用它们的模式中断,所以你应该能够设置这些比特来获得中断。SCIF和PCIF位也应该这样做。但是,使用不能同时启用两个中断的模式和设置PCIE可能比较简单。如果在同一总线上有其他的I2C设备,那么在收到正确的地址字节后,我只想设置PCIE,并尽快将其清除。收到OP。然后,当其他设备被访问时,您不会受到中断。
以上来自于百度翻译 以下为原文 Actually, you're a step ahead of me. I've never used those bits, as I wrote all my I2C code in older PICs that did not have them. The datasheet says they enable interrupts in modes that didn't previously enable them, so you SHOULD be able to just set those bits to get the interrupts. I agree, it would have been easier if they also added SCIF and PCIF bits too. That should do it. However it might be simpler to use the mode that does NOT enable both interrupts, and just set PCIE. If there are other I2C devices on the same bus, I would be tempted to only set PCIE after receiving a correct address byte, and clearing it as soon as the STOP is received. Then you're not getting interrupts when other devices are being accessed. |
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