请问DDR应该涵盖哪个阶段？

短剑，
您是否检查过功率分析仪报告的功率？
您可以将该信息导出到功率估算器spreeadsheet，以便您可以检查更改不同模块上的时钟频率或内存IO上的接口电压时会发生什么变化。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

Dirk,
 
Have you examined the power as reported by the power analyzer?  You may exporty that information to the power estimator spreeadsheet so you may examine what would change when you change clock frequencies on different modules, or the interface voltages on the memory IOs.
 
 
Austin Lesea
Principal Engineer
Xilinx San Jose

我检查了功率分析仪报告 - 但是在不同的设置/频率下比较它们可能是一个重要的开始点。
谢谢。
但是 - 这可能不会改变DDR2-Ram的温度。
我观察到两种设备在最低和最高RAM频率下的类似温度。
这让我想到了最终改变RAM技术的想法。
虽然LPDDR较小但似乎并不是很大......有没有那么明显的设置来降低MCB的功率（两端）？
只需使用Microblaze（无外部RAM），FPGA就会非常“酷”。
当前功率值为：
VCCint  -  1.2V：0.273A
VCCaux  -  2.5V：0.061A
VCCo33  -  3.3V：0.023A
VCCo18  -  1.8V：0.192A（仅限DDR2）
总计：0.9W
谢谢
- 短剑



以下为原文

I examined the power analyzer report - but comparing them at different settings/frequencies could be a point to start. Thank you. But - this may not change the temperature of the DDR2-Ram. I observed similar temperatures of both devices at lowest and highest RAM frequencies. This let me to the thoughts of eventually changing the RAM technology. Although LPDDR is less it seems not to be vast... Are there not-so-obvious settings to reduce power with MCB (on both ends)? With just the Microblaze (no external RAM) the FPGA stays quite 'cool'. The current power values are:
 
VCCint - 1.2V: 0.273A
VCCaux - 2.5V: 0.061A
VCCo33 - 3.3V: 0.023A
VCCo18 - 1.8V: 0.192A (DDR2 only)
Total: 0.9W
 
Thanks
--Dirk

仅供记录:-)
我终于重新设计了威廉希尔官方网站 板并将DDR2改为LPDDR（150MHz）。
相同的申请。
功率约为0.25W，温度保持在35-45°C。
这绝对是可以接受的。
但是我还没有进行全面的性能测试......
- 短剑



以下为原文

Just for the records :-)
 
I finally redesigned the board and changed the DDR2 for a LPDDR (150MHz). Same application. Power is about 0.25W less and temperature stays at 35-45 °C. This is absolutely acceptable. However I did not do full performance tests yet...
 
--Dirk

我终于看到我不是唯一经历过这种情况的人。
德克，我猜是没有人能告诉你为什么S6＆amp;
DDR2运行得如此火爆 - 我也是。
遗憾的是，我现在无法重新设计LPDDR。
也许在路上。
我也看到ddr clk率似乎并不重要。
我还用3.2到3.8的版本构建了MIG  - 没有差异。
我的设计使用100MHz的外部clk（单端）。
我正在以200MHz（400M数据速率）运行ddr clk。
我的XPower结果是：
功率：总1.071W，动态0.308W，静态0.762W
热：TJA 27.8 C / W，最大环境温度70.2，结温44.7
不确定这是如何得到> 60 * C的温度（环境温度为22-25 * C）。
刚加载14.4并重新编译。
新的XPower结果：
功率：总功率0.788W，动态0.278W，静态0510W
热：TJA 27.8 C / W，最大环境温度63.1，结温40.2
我会加载它，看看会发生什么。



以下为原文

I finally see that I'm not the only one who has experienced this.
Dirk, I'm guessing no one was able to tell you why the S6 & DDR2 were running so hot - me either.
I unfortunately don't have the option to redesign to the LPDDR right now. Maybe down the road.
 
I have also seen that the ddr clk rate doesn't seem to matter much.
I've also built the MIG with versions from 3.2 to 3.8 - no diff.
 
My design uses an external clk of 100MHz (single-ended). And am running the ddr clk at 200MHz (400M data rate).
 
My XPower results were:
Power: Total 1.071W, Dynamic 0.308W, Quiescent 0.762WThermal: TJA 27.8 C/W, Max Ambient  70.2, Junction Temp 44.7 Not sure how this gets a temp of >60*C (ambient of 22-25*C). Just loaded 14.4 and recompiled.New XPower results:Power: Total 0.788W, Dynamic 0.278W, Quiescent 0510WThermal: TJA 27.8 C/W, Max Ambient  63.1, Junction Temp 40.2 I'll load this up and see what happens.

friscodesigns写道：
我终于看到我不是唯一经历过这种情况的人。
德克，我猜是没有人能告诉你为什么S6＆amp;
DDR2运行得如此火爆 - 我也是。
遗憾的是，我现在无法重新设计LPDDR。
也许在路上。
就像一个数据点：我做了一个S6的设计，不使用外部DDR内存，但有多个LVDS DDR接口到ADC，另一个高速LVDS DDR接口到另一个板。
该设计也使用了一堆DSP模块和BRAM。
基本上，没有连接到FPGA的散热片和良好的气流，物体会在几分钟内过热并锁定。
（是的，系统散热设计包括适当的热定位，因此是可靠的，但是当没有外壳及其散热的台架测试时，它真的很快就变得非常热。）
----------------------------是的，我这样做是为了谋生。



以下为原文

friscodesigns wrote:
I finally see that I'm not the only one who has experienced this.
Dirk, I'm guessing no one was able to tell you why the S6 & DDR2 were running so hot - me either.
I unfortunately don't have the option to redesign to the LPDDR right now. Maybe down the road.

Just as a data point: I did a design with an S6 which doesn't use an external DDR memory but does have multiple LVDS DDR interfaces to ADCs as well as another high-speed LVDS DDR interface to another board. The design uses a bunch of DSP blocks and BRAMs, too. Basically, without heat sinks attached to the FPGA and decent airflow the thing overheats and locks up in minutes.
 
(Yes, the system thermal design includes proper heat stationing and as such is reliable, but when bench testing without the enclosure and its heat sinking it got real hot real quick.)
----------------------------Yes, I do this for a living.

我对你的非mcb设计感到好奇，你获得了XPower的结果吗？
如果是这样，他们说你的操作/结温应该是多少？
你的力量是什么（dyn + que）？



以下为原文

I'm curious with your non-mcb design, did you obtain XPower results? If so, what did they say your operating/junction temp should be? And what was your power (dyn + que)?

friscodesigns写道：
我对你的非mcb设计感到好奇，你获得了XPower的结果吗？
如果是这样，他们说你的操作/结温应该是多少？
你的力量是什么（dyn + que）？
你是在向谁提出你的问题？
----------------------------是的，我这样做是为了谋生。



以下为原文

friscodesigns wrote:
I'm curious with your non-mcb design, did you obtain XPower results? If so, what did they say your operating/junction temp should be? And what was your power (dyn + que)?

to whom are you addressing your question?
----------------------------Yes, I do this for a living.

Bassman59。
对不起，目前尚不清楚。
如果您有关于工具（XPower Analyzer）所说的有关该设计操作点的详细信息，
我认为这可能是有用的信息。
例如，XPower说我最新版本的热属性是：
TJA：27.8 C / W.
最大环境温度：79.5 * C.
结温：38.8 * C.
所以，我把它解释为内部温度@ 25 * C应该是38.8 * C  - 从理论上讲，温度应该更低。
所以，我的最终问题是：为什么如此大的差异对于测量的外壳温度为60-65 * C？
显然，我不是唯一一个看到这个的人。
XPower工具IP（MIG / MCB）有问题吗？
XPower是否考虑了终端电流？
MIG发生器中是否有一些可以帮助的设置？
这实际上是我应该看到的吗？
我很难相信，因为我在150MHz的ddr clk运行 - 只有1 mcb  -  bank3。
这并不像我在其他地方努力驾驶这部分。
~11％，没有DSP，只有5/32 BRAM，系统/逻辑clk 26Mhz。
在我更小的设计（更少的内存要求）中，我只能使用BRAM  - 即使在100％的BRAM利用率下，温度增加也几乎无法察觉 -  ~35 * C.
我的DDR2接口与SP601的ref设计上显示的相同，除了Elpida DDR2芯片 - 我使用的是三星等效部件，因为Elpida在美国并不常用。
是否有人使用其中一个不会过热的mcbs在S6上创建了DDR2设计？
我使用的是xc6slx16 cs324 3i
使用xc6slx9也看到了相同的结果
对于速度等级为3c，2c，2i的零件。
所以，我真的希望那里有人有一些答案 - 或者可以向那些可能的人提出问题。



以下为原文

Bassman59.
Sorry it wasn't clear.
If you've got more detailed info on what the tools (XPower Analyzer) said about the operating points of that design,
I think that might be useful info.
 
For instance XPower says the thermal properties of my latest build are:
TJA: 27.8 C/W
Max Ambient: 79.5 *C
Junction Temp: 38.8 *C
 
So, I interpret this as the Internal temp @ 25*C should be 38.8 *C - case temp should be less, theoretically.
 
So, my ultimate question is: why such a large discrepancy to measured case temp of 60-65 *C?
Clearly, I'm not the only one seeing this.
 
Is there a problem with the XPower tool, the IP (MIG/MCB)?
Does XPower take into consideration the termination currents?
Is there some setting in the MIG generator that can help?
 
Is this actually what I should be seeing?
I have a hard time believing that since I'm running at a ddr clk of 150MHz - only 1 mcb - bank3.
It's not like I'm driving the part hard elsewhere either. ~11%, no DSP, only 5/32 BRAMs, system/logic clk 26Mhz.
 
In my even smaller designs (less memory requirements) where I can get away with only using BRAM - even at 100% BRAM utilization, the temp increase then is barely perceptable - ~35*C.
 
My DDR2 interface is the same as that shown on the ref design of the SP601, save the Elpida DDR2 chip - I'm using a Samsung equivalent part since the Elpida is not readily available in the US.
 
Has anyone created a DDR2 design on the S6 using one of mcbs that doesn't get overly hot?
I am using the xc6slx16 cs324 3i
Also have seen the same results using the xc6slx9
And with parts with speed ratings of 3c, 2c, 2i.
 
So, I'm really hoping someone out there has some answers - or can pose questions to those who might.
 
 

friscodesigns写道：
Bassman59。
对不起，目前尚不清楚。
如果您有关于工具（XPower Analyzer）所说的有关该设计操作点的详细信息，
我认为这可能是有用的信息。
啊，让我们看看。
报告告诉我：25C环境温度和其他默认值，包括没有散热片和没有气流
1.2V电源拉动0.273A。
2.5V电源下拉0.386A。
3.3V电源拉动0.021A。
有效TJA为19.1 C / W，最高环境C为59℃，结温为53℃。
该设备也未得到充分利用。
我不确定如何摆弄设置以更多地反映我的现实。
我知道当FPGA在环境空气中停留几分钟时会锁定一些东西。
散热解决了这个问题。
----------------------------是的，我这样做是为了谋生。



以下为原文

friscodesigns wrote:
Bassman59.
Sorry it wasn't clear.
If you've got more detailed info on what the tools (XPower Analyzer) said about the operating points of that design,
I think that might be useful info.
 

Ah, let's see. with 25C ambient and other defaults, including no heat sink and no airflow, the report tells me:
 
1.2V supply pulls 0.273A.
2.5V supply pulls 0.386A.
3.3V supply pulls 0.021A.
 
Effective TJA is 19.1 C/W, Max ambient C is 59C, junction temperature is 53C.  The device is way underutilized, too.
 
I'm not sure how to twiddle with the settings to more reflect my reality. I do know that something locked up in the FPGA when it sat in ambient air for a few minutes. Heatsinking solved the problem.
----------------------------Yes, I do this for a living.

您使用的是什么包，TJC每瓦特减少10 * C？



以下为原文

What package are you using that you get 10*C less per watt for TJC?

也，
我不相信XPE会考虑内部终端耗散，它们可能包含在XPA中，但我不确定。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

Also,

I do not believe the internal terminations dissipation are accounted for in XPE, they may be included in XPA, but I am not sure.
 
 
Austin Lesea
Principal Engineer
Xilinx San Jose

对于SpaB来说，MCB的过热问题似乎很常见。
我不得不说散热器是解决方案。
我听说有人试图将SSTL-18的IO规范修改为LVCOMS。
我不确定它能否运作良好。



以下为原文

The over heating problem for MCB seems very common for Sparant6. I have to say heat sink  is the solution. I heard someone tried to modify the IO spec from SSTL-18 to LVCOMS. I am not sure it can work well.