根据我的理解,System Generator是MatLab到RTL的转换,因此不包括Vivado的优化过程。
问题1--是真的。
1,Sysgen反手使用IP核,用于某些块,即FFT,FIR等。
2.黑盒子 - 您可以使用自己的RTL,Xilinx IP在sysgen中导入
3. Mcode - 它使用matlab代码转换为RTL。
应该将mcode写入sysgen用户指南中给出的syntex。
sysgen不支持所有matlab syntex。
例如,不支持循环
4.直接支持一些simulink块。
在simulink工作区右键单击添加块将为您提供支持列表
5.检查sysgen中的索引库,了解sysgen中的所有可用块。
确实,Vivado中的优化将大大改变系统描述,而系统描述不会向后兼容系统生成器模型。
问题2 - 这是真的吗?
[]不是不是真的。
检查sysgen中的可用编译选项
如果1和2都是真的,那么暗示是System Generator模型旁边的点???
问题3 - 是真的
请讨论。
谢谢和RegardsBalkrishan -----------------------------------------------
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以上来自于谷歌翻译
以下为原文
In my understanding, System Generator is a MatLab conversion to RTL and does not therefore include the optimization processes of the Vivado.
Question 1-- is that true.
1, Sysgen use IP cores in backhand for some blocks i.e. FFT , FIR etc.
2. Black box - you can use your own RTL, Xilinx IP to import in sysgen
3. Mcode - its uses matlab code to convert into RTL. the mcode should be written into syntex given in sysgen user guide . the all matlab syntex not supported by sysgen. For example loops not supported
4. some simulink block directly supported . on simulink workspace right click add block will give you supported list
5. Check the index library in sysgen for all the available bocks in sysgen .
It true, the optimization in Vivado would substantially change the system description which would not be backwards compatible to the System Generator Model.
Question 2 -- is that true?
[] no its not true. check available compilation options in sysgen
If 1 and 2 are both true the implication is the System Generator model is beside point ???
Question 3 -- is that true
Please discuss.
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.View solution in original post
根据我的理解,System Generator是MatLab到RTL的转换,因此不包括Vivado的优化过程。
问题1--是真的。
1,Sysgen反手使用IP核,用于某些块,即FFT,FIR等。
2.黑盒子 - 您可以使用自己的RTL,Xilinx IP在sysgen中导入
3. Mcode - 它使用matlab代码转换为RTL。
应该将mcode写入sysgen用户指南中给出的syntex。
sysgen不支持所有matlab syntex。
例如,不支持循环
4.直接支持一些simulink块。
在simulink工作区右键单击添加块将为您提供支持列表
5.检查sysgen中的索引库,了解sysgen中的所有可用块。
确实,Vivado中的优化将大大改变系统描述,而系统描述不会向后兼容系统生成器模型。
问题2 - 这是真的吗?
[]不是不是真的。
检查sysgen中的可用编译选项
如果1和2都是真的,那么暗示是System Generator模型旁边的点???
问题3 - 是真的
请讨论。
谢谢和RegardsBalkrishan -----------------------------------------------
---------------------------------------------请将帖子标记为
一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。
在原帖中查看解决方案
以上来自于谷歌翻译
以下为原文
In my understanding, System Generator is a MatLab conversion to RTL and does not therefore include the optimization processes of the Vivado.
Question 1-- is that true.
1, Sysgen use IP cores in backhand for some blocks i.e. FFT , FIR etc.
2. Black box - you can use your own RTL, Xilinx IP to import in sysgen
3. Mcode - its uses matlab code to convert into RTL. the mcode should be written into syntex given in sysgen user guide . the all matlab syntex not supported by sysgen. For example loops not supported
4. some simulink block directly supported . on simulink workspace right click add block will give you supported list
5. Check the index library in sysgen for all the available bocks in sysgen .
It true, the optimization in Vivado would substantially change the system description which would not be backwards compatible to the System Generator Model.
Question 2 -- is that true?
[] no its not true. check available compilation options in sysgen
If 1 and 2 are both true the implication is the System Generator model is beside point ???
Question 3 -- is that true
Please discuss.
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.View solution in original post
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