嗨Giovanni,所有XC6SLX9设备的.cor文件将是相同的,因为所有这些设备具有相同的ID代码。
所以,我不认为它与.cor文件的问题。
如果你想删除这个混淆,那么从我们的网站下载最新版本的labtools(14.6)并测试它。我怀疑FPGA和闪存之间的连接是否合适。
你能发布原理图吗?
您是否能够在SPI上执行擦除/验证操作?问候,Krishna
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Hi Giovanni,
The .cor files for all XC6SLX9 devices will be the same since all these devices have the same ID code.
So, I don't think its the issue with the .cor file. If you want to remove this confudion then download the latest version of labtools (14.6) from our website and test it.
I suspect the connections between FPGA and flash are nt proper. Can you please post the schematic?
Are you able to perform erase/verfiy operations on the SPI?
Regards,
Krishna-----------------------------------------------------------------------------------------------
Please mark the post as "Accept as solution" if the information provided answers your query/resolves your issue.
Give Kudos to a post which you think is helpful.
嗨Giovanni,所有XC6SLX9设备的.cor文件将是相同的,因为所有这些设备具有相同的ID代码。
所以,我不认为它与.cor文件的问题。
如果你想删除这个混淆,那么从我们的网站下载最新版本的labtools(14.6)并测试它。我怀疑FPGA和闪存之间的连接是否合适。
你能发布原理图吗?
您是否能够在SPI上执行擦除/验证操作?问候,Krishna
--------------------------------------------------
---------------------------------------------请将帖子标记为
如果提供的信息能够回答您的问题/解决您的问题,请“接受为解决方案”。给予您认为有用的帖子。
以上来自于谷歌翻译
以下为原文
Hi Giovanni,
The .cor files for all XC6SLX9 devices will be the same since all these devices have the same ID code.
So, I don't think its the issue with the .cor file. If you want to remove this confudion then download the latest version of labtools (14.6) from our website and test it.
I suspect the connections between FPGA and flash are nt proper. Can you please post the schematic?
Are you able to perform erase/verfiy operations on the SPI?
Regards,
Krishna-----------------------------------------------------------------------------------------------
Please mark the post as "Accept as solution" if the information provided answers your query/resolves your issue.
Give Kudos to a post which you think is helpful.
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